Many of today's operational complementary metal-oxide-silicon (CMOS) field effect transistor (FET) amplifiers used in telecommunication applications require reference voltages which track fabrication processing variations. Voltage generator circuits which generate the needed reference voltages typically use circuitry which mirrors the amplifier circuitry. Standard transistorresistor divider networks are typically used to bias the circuitry of the voltage generator. One problem with this type of voltage generator circuitry is that it does not optimize the output reference levels such that the dynamic range (output voltage swing) of the amplifier is maximized.
It is desirable to have voltage generator circuitry which generates reference voltage levels that tend to optimize the dynamic range of operational amplifiers.